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 HI-390
Data Sheet July 1999 File Number
4754
CMOS Analog Switch
The Hl-390 switch is a monolithic device fabricated using CMOS technology and the Intersil dielectric isolation process. This device is TTL compatible and features low leakage and supply currents, low and nearly constant ON resistance over the analog signal range, break-before-make switching and low power dissipation.
Features
* Analog Signal Range (15V Supplies) . . . . . . . . . . . 15V * Low Leakage . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40pA * Low On Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . 35 * Break-Before-Make Delay . . . . . . . . . . . . . . . . . . . . 60ns * Charge Injection . . . . . . . . . . . . . . . . . . . . . . . . . . . . 30pC
Ordering Information
PART NUMBER HI1-0390-2 HI3-0390-5 TEMP. RANGE (oC) -55 to 125 0 to 75 PACKAGE 16 Ld CERDIP 16 Ld PDIP PKG. NO. F16.3 E16.3
* TTL Compatible * Symmetrical Switch Elements * Low Operating Power . . . . . . . . . . . . . . . . . . . . . . . 1.0mW
Applications
* Sample and Hold (i.e., Low Leakage Switching) * Op Amp Gain Switching (i.e., Low On Resistance) * Portable, Battery Operated Circuits * Low Level Switching Circuits * Dual or Single Supply Systems
Pinout
Switch States shown for a Logic "1" Input DUAL SPDT HI-390 (CERDIP, PDIP) TOP VIEW
D1 1 NC 2 D3 3 S3 4 S4 5 D4 6 NC 7 D2 8 16 S1 15 IN1 14 V13 GND 12 NC 11 V+ 10 IN2 9 S2
Functional Diagram
S IN N P D
LOGIC 0 1
SW1, SW2 OFF ON
SW3, SW4 ON OFF
1
CAUTION: These devices are sensitive to electrostatic discharge; follow proper IC Handling Procedures. http://www.intersil.com or 407-727-9207 | Copyright (c) Intersil Corporation 1999
HI-390 Schematic Diagrams
SWITCH CELL
A V+
MN1B
MN2B MP5B IN
MN3B OUT MN4B MN5B
MP4B
MP3B
MP2B MP1B
A
V-
DIGITAL INPUT BUFFER AND LEVEL SHIFTER
V+ D2A 200 LOGIC IN D1A GND VSWITCH CELL DRIVER (ONE PER SWITCH CELL) MN1A MN2A MN3A MN4A MN5A MN6A MN7A MN8A A A MP1A MP2A MP3A MP4A MP5A MP6A MP7A MP8A
2
HI-390
Absolute Maximum Ratings
Voltage Between Supplies (V+ to V-) . . . . . . . . . . . . . . . . . . . . . 44V Digital Input Voltage . . . . . . . . . . . . . . . . . . . . . . (V+) +4V to (V-) -4V Analog Input Voltage . . . . . . . . . . . . . . . . . . (V+) +1.5V to (V-) -1.5V
Thermal Information
Thermal Resistance (Typical, Note 1) JA (oC/W) JC (oC/W) CERDIP Package. . . . . . . . . . . . . . . . . 90 36 PDIP Package . . . . . . . . . . . . . . . . . . . 95 N/A Maximum Junction Temperature Hermetic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 175oC Plastic Package . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 150oC Maximum Storage Temperature Range . . . . . . . . . . -65oC to 150oC Maximum Lead Temperature (Soldering 10s) . . . . . . . . . . . . 300oC
Operating Conditions
Temperature Ranges HI-390-2 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . -55oC to 125oC HI-390-5 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 0oC to 75oC
CAUTION: Stresses above those listed in "Absolute Maximum Ratings" may cause permanent damage to the device. This is a stress only rating and operation of the device at these or any other conditions above those indicated in the operational sections of this specification is not implied.
NOTE: 1. JA is measured with the component mounted on an evaluation PC board in free air.
Electrical Specifications
Supplies = +15V, -15V; VIN = Logic Input. VIN for Logic "1" = 4V, for Logic "0" = 0.8V, Unless Otherwise Specified TEMP (oC) -2 MIN TYP MAX MIN -5 TYP MAX UNITS
PARAMETER DYNAMIC CHARACTERISTICS Switch ON Time, tON Switch OFF Time, tOFF Break-Before-Make Delay, tOPEN Charge Injection Voltage, V OFF Isolation Input Switch Capacitance, CS(OFF) Output Switch Capacitance, CD(OFF) Output Switch Capacitance, CD(ON) Digital Input Capacitance, CIN DIGITAL INPUT CHARACTERISTICS Input Low Level, VINL Input High Level, VINH Input Leakage Current (Low), IINL Input Leakage Current (High), IINH ANALOG SWITCH CHARACTERISTICS Analog Signal Range ON Resistance, rON
TEST CONDITIONS
25 25 25 (Note 7) (Note 6) 25 25 25 25 25 25
-
210 160 60 3 60 16 14 35 5
300 250 -
-
210 160 60 3 60 16 14 35 5
300 250 -
ns ns ns mV dB pF pF pF pF
Full Full (Note 5) (Note 5) Full Full
4 -
-
0.8 1 1
4 -
-
0.8 1 1
V V A A
Full (Note 2) 25 Full
-15 -
35 40 0.04 1 0.04 1 0.03 0.5
+15 50 75 1 100 1 100 1 100
-15 -
35 45 0.04 0.2 0.04 0.2 0.03 0.2
+15 50 75 5 100 5 100 5 100
V nA nA nA nA nA nA
OFF Input Leakage Current, IS(OFF)
(Note 3)
25 Full
OFF Output Leakage Current, ID(OFF)
(Note 3)
25 Full
ON Input Leakage Current, IS(ON)
(Note 4)
25 Full
3
HI-390
Electrical Specifications
Supplies = +15V, -15V; VIN = Logic Input. VIN for Logic "1" = 4V, for Logic "0" = 0.8V, Unless Otherwise Specified (Continued) TEMP (oC) -2 MIN TYP MAX MIN -5 TYP MAX UNITS
PARAMETER POWER SUPPLY CHARACTERISTICS Current, I+
TEST CONDITIONS
(Note 8)
25 Full
-
0.09 0.01 0.01 0.01 -
0.5 1 10 100 10 100 10 100
-
0.09 0.01 0.01 0.01 -
0.5 1 100 100 100 -
mA mA A A A A A A
Current, I-
(Note 8)
25 Full
Current, I+
(Note 9)
25 Full
Current, I-
(Note 9)
25 Full
NOTES: 2. VS = 10V, IOUT = 10mA. On resistance derived from the voltage measured across the switch under these conditions. 3. VS = 14V, VD = 14V. 4. VS = VD = 14V. 5. The digital inputs are diode protected MOS gates and typical leakages of 1nA or less can be expected. 6. VS = 1VRMS , f = 500kHz, CL = 15pF, RL = 1K, CL = CFIXTURE + CPROBE, OFF Isolation = 20 Log VS /VD . 7. VS = 0V, CL = 10nF, Logic Drive = 5V pulse. Switches are symmetrical; S and D may be interchanged. Charge Injection = Q = CL x V. 8. VIN = 4V (one input, all other inputs = 0V). 9. VIN = 0.8V (all inputs).
Test Circuits and Waveforms
15V V+ RGEN = 0 S D RL 10k CL 10pF LOGIC INPUT (V) 6 4 2 0 LOGIC INPUT
VGEN
IN
VLOGIC
GND
V0 0.4 0.8 TIME (s) 1.2 1.6
-15V
FIGURE 1A. TEST CIRCUIT
FIGURE 1B. LOGIC INPUT
OUTPUT VOLTAGE (V)
10 5 0 VGEN = 10V
(NOTE 10)
OUTPUT VOLTAGE (V)
5 0 VGEN = 5V
0
0.4
0.8 TIME (s)
1.2
1.6
0
0.4
0.8 TIME (s)
1.2
1.6
FIGURE 1C. VANALOG = 10V
FIGURE 1D. VANALOG = 5V
4
HI-390 Test Circuits and Waveforms
(Continued)
OUTPUT VOLTAGE (V)
5 0 -5 VGEN = 0V
OUTPUT VOLTAGE (V)
0 -5 VGEN = -5V
0
0.4
0.8 TIME (s)
1.2
1.6
0
0.4
0.8 TIME (s)
1.2
1.6
FIGURE 1E. VANALOG = 0V
FIGURE 1F. VANALOG = -5V
OUTPUT VOLTAGE (V)
0 -5 -10 VGEN = -10V 0 0.4 0.8 TIME (s) 1.2 1.6
FIGURE 1G. VANALOG = -10V NOTE: 10. If RGEN , RL or CL is increased, there will be proportional increases in rise and/or fall RC times. FIGURE 1. SWITCHING WAVEFORMS FOR VARIOUS ANALOG INPUT VOLTAGES
Typical Performance Curves
80 V+ = +15V, V- = -15V 80 TA = 25oC 60 125oC 25oC -55oC rDS(ON) () D
60 rDS(ON) ()
C
40
40
B A
20
0 -15
-10
-5
0
5
10
15
20 A B C D 0 -15
V+ = +15V, V- = -15V V+ = +10V, V- = -10V V+ = +7.5V, V- = -7.5V V+ = +5V, V- = -5V -10 -5 0 5 10 15
DRAIN VOLTAGE (V)
DRAIN VOLTAGE (V)
FIGURE 2. rDS(ON) vs VD
FIGURE 3. rDS(ON) vs VD
5
HI-390 Typical Performance Curves
100 V+ = +15V, V- = -15V TA = 25oC, VS = 15V, RL = 2K POWER DISSIPATION (mW) OFF ISOLATION (dB)
(Continued)
100 V+ = +15V, V- = -15V CLOAD = 30pF, VS = 1VRMS 80 RL = 100 60 RL = 1k 40
10
1.0
20
0.1
1
10
100
1K
10K
100K
1M
0 105
106
LOGIC SWITCHING FREQUENCY (50% DUTY CYCLE) (Hz)
107 108 FREQUENCY (Hz)
FIGURE 4. DEVICE POWER DISSIPATION vs SWITCHING FREQUENCY (SINGLE LOGIC INPUT)
10.0 V+ = +15V, V- = -15V 10.0
FIGURE 5. OFF ISOLATION vs FREQUENCY
V+ = +15V, V- = -15V | VD | = | VS | = 14V
IS(OFF) OR ID(OFF) (nA)
1.0 ID(ON) (nA) 0.1
1.0
0.1
0.01 25
75 125 TEMPERATURE (oC)
0.01 25
75
125
TEMPERATURE (oC)
FIGURE 6. IS(OFF) OR ID(OFF) vs TEMPERATURE (NOTE 11) NOTE:
FIGURE 7. ID(ON) vs TEMPERATURE (NOTE 11)
11. The net leakage into the source or drain is the N-Channel leakage minus the P-Channel leakage. This difference can be positive, negative or zero depending on the analog voltage and temperature, and will vary greatly from unit to unit.
60
16
50 CD(ON) (pF)
12
40
CIN (pF)
8
TRANSITION (INDETERMINATE DUE TO ACTIVE INPUT)
30
4
20 0 2 4 6 8 10 DRAIN VOLTAGE (V) 12 14 16 0 2 4 6 8 10 INPUT VOLTAGE (V) 12 14 16
FIGURE 8. OUTPUT ON CAPACITANCE vs DRAIN VOLTAGE
FIGURE 9. DIGITAL INPUT CAPACITANCE vs INPUT VOLTAGE
6
HI-390 Typical Performance Curves
300 V+ = +15V, V- = -15V VINH = 4.0V, VINL = 0V tON tON , tOFF (ns) tON , tOFF (ns) 200 300 tON V+ = +15V, TA = 25oC VINH = 4V, VINL = 0V
(Continued)
200
tOFF
tOFF 100
100
0 -55
-35
-15
5 25 45 65 TEMPERATURE (oC)
85
105
125
0
5 10 NEGATIVE SUPPLY (V)
15
FIGURE 10. SWITCHING TIME vs TEMPERATURE
FIGURE 11. SWITCHING TIME vs NEGATIVE SUPPLY VOLTAGE
1.8 INPUT SWITCHING THRESHOLD (V) 1.6 1.4 tON, tOFF (s) 1.2 1.0 0.8 0.6 tON 0.4 0.2 0 0 5 10 15 POSITIVE SUPPLY VOLTAGE (V) tOFF V- = -15V, TA = 25oC VINH = 4.0V, VINL = 0V
7 V- = -15V, TA = 25oC 6 5 4 3 2 1 0 0 5 10 15 POSITIVE SUPPLY VOLTAGE (V)
FIGURE 12. SWITCHING TIME vs POSITIVE SUPPLY VOLTAGE
FIGURE 13. INPUT SWITCHING THRESHOLD vs POSITIVE SUPPLY VOLTAGE
All Intersil semiconductor products are manufactured, assembled and tested under ISO9000 quality systems certification.
Intersil semiconductor products are sold by description only. Intersil Corporation reserves the right to make changes in circuit design and/or specifications at any time without notice. Accordingly, the reader is cautioned to verify that data sheets are current before placing orders. Information furnished by Intersil is believed to be accurate and reliable. However, no responsibility is assumed by Intersil or its subsidiaries for its use; nor for any infringements of patents or other rights of third parties which may result from its use. No license is granted by implication or otherwise under any patent or patent rights of Intersil or its subsidiaries.
For information regarding Intersil Corporation and its products, see web site http://www.intersil.com
Sales Office Headquarters
NORTH AMERICA Intersil Corporation P. O. Box 883, Mail Stop 53-204 Melbourne, FL 32902 TEL: (407) 724-7000 FAX: (407) 724-7240 EUROPE Intersil SA Mercure Center 100, Rue de la Fusee 1130 Brussels, Belgium TEL: (32) 2.724.2111 FAX: (32) 2.724.22.05 ASIA Intersil (Taiwan) Ltd. 7F-6, No. 101 Fu Hsing North Road Taipei, Taiwan Republic of China TEL: (886) 2 2716 9310 FAX: (886) 2 2715 3029
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